[PAST EVENT] In-Package Interconnection Networks in the Era of Exascale and Beyond
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In-Package Interconnection Networks in the Era of Exascale and Beyond
Modern computer systems have evolved from relatively simple microprocessors to complex systems-on-chips (SoCs). Current systems already integrate CPUs, GPUs, networks on chips (NoCs), memory controllers, and more. Looking forward, future exascale computer systems are likely to scale both in functional diversity (inclusion of CPUs, GPUs, FPGAs and other accelerators) and size (number of CPU/GPU/FPGA compute resources) to support increasingly complex processing for immersive virtual reality applications, machine learning workloads, “Big Data” and “Big Compute”. NoCs, and broadly in-package interconnection networks, provide a uniform interface to connect different system components and enable a modular and scalable system integration. In this talk, I will discuss my work on designing in-package interconnection networks for future exascale heterogeneous systems. I will first present a composable routing methodology that enables modular design and integration of heterogeneous systems. Then, I will present a methodology to model the in-package communication of large-scale heterogeneous systems; and the methodology enables fast design space exploration. Finally, I will describe how we use machine learning techniques to optimize the in-package network for complex systems.
Jieming Yin is a researcher at AMD Research, where he worked on FastForward 2 Project and PathForward Project funded by the Department of Energy, aiming to accelerate the R&D necessary to build the nation’s first exascale supercomputers. He obtained his Ph.D. in Computer Science from University of Minnesota-Twin Cities in 2015 and joined AMD in the same year. His research interests lie in computer architecture, with emphasis on SoC system integration, network on chips, and machine learning aided computer system design. Jieming has published a number of papers in top-tier conference venues, and he holds over 10 US patents and patent applications. His work on modular routing design for chiplet-based systems was featured in IEEE Spectrum in 2018.